In manufacturing of a semiconductor device, a photolithography process is generally used for forming an ITO (Indium Tin Oxide) film or an electrode pattern on a substrate such as a semiconductor wafer and an LCD glass substrate. Such a photolithography process coats a substrate with photoresist (hereinafter simply referred to as “resist”) to form a resist film, exposes the resist film so as to transfer thereto a predetermined circuit pattern, and develops the resist film, so that a desired pattern is formed in the resist film.
The above steps are generally performed by a coating and developing system, which includes various types of process units such as a resist coating unit that coats a substrate with a resist liquid, a baking unit that performs a heating treatment to a substrate that has been subjected to a resist coating step and a substrate that has been subjected to an exposure step, and a development unit that develops an exposed substrate by supplying thereto a developer, wherein every type of process unit numbers plural.
In recent years, there are growing needs of further miniaturization of a device pattern. As one of the solutions for achieving miniaturization, a so-called, multi-patterning technique that performs the lithography process two or more times has been studied. In addition to the multiple lithography processes, the multi-pattering technique requires an etching process for microfabrication of a resist.
There have been conventionally known systems in which a substrate is transferred to a plurality of processing apparatuses for the lithography process and an etching apparatus so that the substrate is subjected to the lithography processes and the etching processes. Some of such systems are configured to repeatedly perform the lithography process (see, claims and FIG. 1 of JP7-66265A, for example).
In the system disclosed in JP7-66265A, since the lithography process can be repeatedly performed, multiple patterns can be formed on a substrate. However, in such a system, since the process schedule for each process unit is determined with placing the top priority on throughput, the relationship between the process unit used for the first lithography process and the process unit used for the second lithography process is not managed. Thus, there may be a problem in that, due to the individual difference among the process units, misalignment or pattern dimension difference between the pattern formed by the first lithography process and the pattern formed by the second lithography process may occur, resulting in insufficient accuracy of the finally obtained pattern.